Browsing by Author "Hlukhov, Valeriy"

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Approach To implementation on Fpga of data compression algorithm C Llanguage descriptions by the means of vivado package
(Видавництво Львівської політехніки, 2017-12-23) Khomits, Valya; Hlukhov, Valeriy; Lviv Polytechnic National University
The features of devices for monochrome images lossless compression by JPEG-LS method in modern element base are discussed. Capabilities of Vivado package (Xilinx) for JPEG-LS algorithm C- to suitable for implementation in FPGAs VHDL-descriptions transformation were tested and described. C language structures, which can not be processed by specified means and possible circumvention of such structures were defined.
Computing square roots and solve equations of ECC over galois fields
(Видавництво Львівської політехніки, 2017-12-23) Rahma, Mohammed Kadhim; Hlukhov, Valeriy; Lviv Polytechnic National University
Computing square roots in finite fields are important computational problems with significant applications to cryptography. Therefore, in this paper, we introduced some methods for finding square roots. Our proposed method calculates the Square root using multiplier over. The proposed method is competitive compared with other existing methods. It is introduced development to decrease of complexity of arithmetic units. In addition, we approach a novel technique for Computation square roots presented using Half_even_odd unit mixed with multiplier and adder. One approach of Square Root presented using the same multiplier for arithmetic units of ECC. Thus, we goes to gets on reduced complexity for arithmetic units.
Hardware complexity of multipliers of extended Galois field in FPGA
(Видавництво Львівської політехніки, 2017-12-23) Zholubak, Ivan; Hlukhov, Valeriy; Lviv Polytechnic National University
In this paper, the implamantation of matrix multiplier of the Galois fields with basics 2, 3, 7, 13 and the analysis of the implementation of multipliers with a higher basis on the FPGA Xilinx Virtex-7 is considered. It is shown that the smallest hardware costs will be in multiplier of Galois fields with a base 3, 29% less than in binary fields. For the implementation of the Guild cells with a large foundation, the core generator of the modified Guild cells was implemented..
Research hardware complexity of multipliers of extended Galois field GF(dm)
(Lviv Polytechnic Publishing House, 2016) Zholubak, Ivan; Hlukhov, Valeriy; Lviv Polytechnic National University
The paper analyzes the hardware costs of multipliers of extended Galois fields GF(dm). There are compared realised on modern FPGA Galois fields multipliers hardware cost to select Galois field GF(dm) with approximately the same number of elements and the lowest multiplier hardware complexity. Totally the hardware cost increases while basics of the field increase. Local minimums for odd d correspond to d = 2i-1 and the global minimum for analisys based on Guild cell with realization like single unit corresponds to the value d = 3 and based on Guild cell with its multiplier and adder separate realization – the value d=7.
Wireless data transfer technologies suitability evaluation for educational laboratories modernization
(Lviv Polytechnic Publishing House, 2016) Bybel, Viktoriia; Hlukhov, Valeriy; Prystopiuk, Oleksandr; Lviv Polytechnic National University
The results of research, evaluation and comparison of wireless data transmission technologies that can be used in the construction of the collection and data management system for the scientific and educational institutions. An expediency of the study in this direction made by analyzing the current trends of computer networks and systems. It is proposed to use Bluetooth Low Energy Protocol as a decision for modernization of the processes of setting scientific research and adaptation of the educational process of higher education in Ukraine with the requirements of society and the labor market.