Multiprocessor system on chip based on programmable processor cores Nios II Altera - Klymenko, Iryna; Storozhuk, Alexander (Видавництво Львівської політехніки, 2013)
The features of a standard design flow facilities SOPC Builder Altera to develop multiprocessor systems are considered. Modeling and research of programmable multiprocessor cores NIOS II Altera, which are designed for high-performance control functions are completed.
Keywords: Multiprocessor System on Chip; System on a Programmable Chip Builder; Field-Programmable Gate Array; processor cores Nios II Altera; design flow; Cyclone II