Series termination of single-ended LVCMOS signals

Simple item page
dc.citation.epage9
dc.citation.issue4
dc.citation.journalTitleВимірювальна техніка та метрологія
dc.citation.spage5
dc.contributor.affiliationLviv Polytechnic National University
dc.contributor.authorSeheda, Oleh
dc.contributor.authorNazarkevych, Ihor
dc.coverage.placenameЛьвів
dc.coverage.placenameLviv
dc.date.accessioned2024-04-03T07:16:39Z
dc.date.available2024-04-03T07:16:39Z
dc.date.created2023-03-01
dc.date.issued2023-03-01
dc.description.abstractFor synchronous signals with fast edges traces on printed circuit boards are transmission lines, not just conductor connections. If the length of the PCB trace exceeds certain values, it is necessary to match its impedance with the signal source and/or receiver. Impedance mismatches would bring signal reflections from the source to the receiver and back through the transmission line. Such reflection or distortion of the signal is called "echo" or "ringing". It is shown in emissions and irregularities of the waveform, especially the rise and fall edge. In this article, practical guidelines for sequential termination of one-way signals are considered that would resolve such effects. The simulations were done for LVCMOS signals [1].
dc.format.extent5-9
dc.format.pages5
dc.identifier.citationSeheda O. Series termination of single-ended LVCMOS signals / Oleh Seheda, Ihor Nazarkevych // Measuring Equipment and Metrology. — Lviv : Lviv Politechnic Publishing House, 2023. — Vol 84. — No 4. — P. 5–9.
dc.identifier.citationenSeheda O. Series termination of single-ended LVCMOS signals / Oleh Seheda, Ihor Nazarkevych // Measuring Equipment and Metrology. — Lviv : Lviv Politechnic Publishing House, 2023. — Vol 84. — No 4. — P. 5–9.
dc.identifier.doidoi.org/10.23939/istcmtm2023.04.005
dc.identifier.urihttps://ena.lpnu.ua/handle/ntb/61624
dc.language.isoen
dc.publisherВидавництво Львівської політехніки
dc.publisherLviv Politechnic Publishing House
dc.relation.ispartofВимірювальна техніка та метрологія, 4 (84), 2023
dc.relation.ispartofMeasuring Equipment and Metrology, 4 (84), 2023
dc.relation.references[1] JEDEC STANDARD – JESD8C.01, Minor Revision of JESD8C, June 2006. [Online]. Available: https://www.jedec.org/system/files/docs/JESD8C-01.pdf.
dc.relation.references[2] D. Thomas, H. Nasser, M. Hafiz Baharuddin, “Timedomain measurement of near field emissions from complex PCBs”, October 2016. [Online]. Available: https://www.researchgate.net/publication/312561763_Time_domain_measurement_of_near_field_emissions_from_complex_PCBs.
dc.relation.references[3] Dr. Johnson, Howard, Dr. Graham, Martin, High-Speed Digital Design, A Handbook of Black Magic, Prentice Hall, 1993. [Online]. Available: https://www.amazon.com/HighSpeed-Digital-Design-Handbook/dp/0133957241.
dc.relation.references[4] M. Faheemuddin, “What is the signal propagation delay in PCBs”. [Online]. Available: https://www.protoexpress.com/blog/signal-propagation-delay-pcb/.
dc.relation.references[5] Lee Ritchey, “Transmission Line Termination Techniques in High-Speed Design”. [Online]. Available: https://resources.altium.com/p/transmission-lines-and-terminationsin-high-speed-design.
dc.relation.references[6] B. Olney, “Beyond Design: Transmission Line Termination,” Design007 Magazine, March 2020, p. 36-42. [Online]. Available: https://iconnect007.uberflip.com/i/1219242-design007-mar2020/35?.
dc.relation.references[7] P. Ghosh, “Techniques to measure and avoid jitter in PCBs”. [Online]. Available: https://www.protoexpress.com/blog/techniques-to-measure-and-avoid-jitter-in-pcbs/.
dc.relation.references[8] O. Bolt, “AC Vs DC Coupled: Battery Storage, Oscilloscope, and Termination”. [Online]. Available: https://energytheory.com/ac-vs-dc-coupled/.
dc.relation.references[9] M. Cox, “Methods to end a 50-ohm transmission line while avoiding the need for DC”. [Online]. Available: https://copyprogramming.com/howto/how-to-terminate-50-ohm-transmission-line-without-drawing-dc.
dc.relation.references[10] SiT8008-datasheet. Datasheet. [Online]. Available: https://www.sitime.com/support/resourcelibrary/datasheets/sit8008-data
dc.relation.referencesen[1] JEDEC STANDARD – JESD8C.01, Minor Revision of JESD8C, June 2006. [Online]. Available: https://www.jedec.org/system/files/docs/JESD8C-01.pdf.
dc.relation.referencesen[2] D. Thomas, H. Nasser, M. Hafiz Baharuddin, "Timedomain measurement of near field emissions from complex PCBs", October 2016. [Online]. Available: https://www.researchgate.net/publication/312561763_Time_domain_measurement_of_near_field_emissions_from_complex_PCBs.
dc.relation.referencesen[3] Dr. Johnson, Howard, Dr. Graham, Martin, High-Speed Digital Design, A Handbook of Black Magic, Prentice Hall, 1993. [Online]. Available: https://www.amazon.com/HighSpeed-Digital-Design-Handbook/dp/0133957241.
dc.relation.referencesen[4] M. Faheemuddin, "What is the signal propagation delay in PCBs". [Online]. Available: https://www.protoexpress.com/blog/signal-propagation-delay-pcb/.
dc.relation.referencesen[5] Lee Ritchey, "Transmission Line Termination Techniques in High-Speed Design". [Online]. Available: https://resources.altium.com/p/transmission-lines-and-terminationsin-high-speed-design.
dc.relation.referencesen[6] B. Olney, "Beyond Design: Transmission Line Termination," Design007 Magazine, March 2020, p. 36-42. [Online]. Available: https://iconnect007.uberflip.com/i/1219242-design007-mar2020/35?.
dc.relation.referencesen[7] P. Ghosh, "Techniques to measure and avoid jitter in PCBs". [Online]. Available: https://www.protoexpress.com/blog/techniques-to-measure-and-avoid-jitter-in-pcbs/.
dc.relation.referencesen[8] O. Bolt, "AC Vs DC Coupled: Battery Storage, Oscilloscope, and Termination". [Online]. Available: https://energytheory.com/ac-vs-dc-coupled/.
dc.relation.referencesen[9] M. Cox, "Methods to end a 50-ohm transmission line while avoiding the need for DC". [Online]. Available: https://copyprogramming.com/howto/how-to-terminate-50-ohm-transmission-line-without-drawing-dc.
dc.relation.referencesen[10] SiT8008-datasheet. Datasheet. [Online]. Available: https://www.sitime.com/support/resourcelibrary/datasheets/sit8008-data
dc.relation.urihttps://www.jedec.org/system/files/docs/JESD8C-01.pdf
dc.relation.urihttps://www.researchgate.net/publication/312561763_Time_domain_measurement_of_near_field_emissions_from_complex_PCBs
dc.relation.urihttps://www.amazon.com/HighSpeed-Digital-Design-Handbook/dp/0133957241
dc.relation.urihttps://www.protoexpress.com/blog/signal-propagation-delay-pcb/
dc.relation.urihttps://resources.altium.com/p/transmission-lines-and-terminationsin-high-speed-design
dc.relation.urihttps://iconnect007.uberflip.com/i/1219242-design007-mar2020/35?
dc.relation.urihttps://www.protoexpress.com/blog/techniques-to-measure-and-avoid-jitter-in-pcbs/
dc.relation.urihttps://energytheory.com/ac-vs-dc-coupled/
dc.relation.urihttps://copyprogramming.com/howto/how-to-terminate-50-ohm-transmission-line-without-drawing-dc
dc.relation.urihttps://www.sitime.com/support/resourcelibrary/datasheets/sit8008-data
dc.rights.holder© Національний університет “Львівська політехніка”, 2023
dc.subjectSingle-ended signals
dc.subjectsynchronous signals
dc.subjectimpedance matching
dc.subjectrise/fall time
dc.subjecttransmission line
dc.titleSeries termination of single-ended LVCMOS signals
dc.typeArticle

Files

Original bundle

Now showing 1 - 2 of 2
Thumbnail Image
Name:
2023v84n4_Seheda_O-Series_termination_of_single_5-9.pdf
Size:
441.5 KB
Format:
Adobe Portable Document Format
Download
Thumbnail Image
Name:
2023v84n4_Seheda_O-Series_termination_of_single_5-9__COVER.png
Size:
489.6 KB
Format:
Portable Network Graphics
Download

License bundle

Now showing 1 - 1 of 1
No Thumbnail Available
Name:
license.txt
Size:
1.76 KB
Format:
Plain Text
Description:
Download

Collections

Вимірювальна техніка та метрологія. – 2023. – Випуск 84, №4