Parallel ordered-access machine computational model and architecture
dc.citation.journalTitle | Advances in Cyber-Physical Systems | |
dc.citation.volume | Volume 1, number 2 | |
dc.contributor.affiliation | Lviv Polytechnic National University | uk_UA |
dc.contributor.author | Melnyk, Anatoliy | |
dc.coverage.country | UA | uk_UA |
dc.coverage.placename | Львів | uk_UA |
dc.date.accessioned | 2017-11-24T07:48:12Z | |
dc.date.available | 2017-11-24T07:48:12Z | |
dc.date.issued | 2016 | |
dc.description.abstract | The article presents the new computational model which we name the parallel ordered-access machine because of its base – the parallel ordered-access memory. It also describes the computer architecture which implements proposed computational model and owing to this does not have such a limitation as the memory wall and provides parallel conflict-free memory access. The efficiency of the proposed ordered-access machine computational model is evaluated and an example of its implementation is presented. | uk_UA |
dc.format.pages | 93–101 | |
dc.identifier.citation | Melnyk A. Parallel ordered-access machine computational model and architecture / Anatoliy Melnyk // Advances in Cyber-Physical Systems. – 2016. – Volume 1, number 2. – P. 93–101. – Bibliography: 39 titles. | uk_UA |
dc.identifier.uri | https://ena.lpnu.ua/handle/ntb/39359 | |
dc.language.iso | en | uk_UA |
dc.publisher | Publishing House of Lviv Polytechnic National University | uk_UA |
dc.rights.holder | © Melnyk A., 2016 | uk_UA |
dc.subject | Computational model | uk_UA |
dc.subject | Computer architecture | uk_UA |
dc.subject | Parallel ordered-access memory | uk_UA |
dc.subject | Parallel ordered-access machine | uk_UA |
dc.title | Parallel ordered-access machine computational model and architecture | uk_UA |
dc.type | Article | uk_UA |