The reflections produced by lumped load of digital signal line

Simple item page
dc.citation.journalTitleЕлементи теорії та прилади твердотілої електроніки
dc.contributor.affiliationUniversity Politehnica Bucharestuk_UA
dc.contributor.authorGolumbeanu, Virgil
dc.contributor.authorSvasta, Paul
dc.contributor.authorIonescu, Ciprian
dc.coverage.countryUAuk_UA
dc.coverage.placenameЛьвівuk_UA
dc.date.accessioned2018-08-28T14:15:46Z
dc.date.available2018-08-28T14:15:46Z
dc.date.issued2002
dc.description.abstractIn interconnection technique of digital circuits in general the matched lines method for reducing the influence of reflections in a view to a good working of interconnected circuits is used. Due to the input capacitance of digital circuits appears a reactance load. Although the matching is very good realized from the viewpoint of the resistive load, there is a reactive mismatching that can produce reflections at high frequency. Using Laplace transformation the reflections produced by parasitic capacitance load will be determined. These reflections will be analyzed depending on the type of the digital circuits and the parameters of the interconnection line. For some types of digital circuits the maximum fanout from this point of view will be determined.uk_UA
dc.format.pages99–105
dc.identifier.citationGolumbeanu V. The reflections produced by lumped load of digital signal line / Virgil Golumbeanu, Paul Svasta, Ciprian Ionescu // Вісник Національного університету "Львівська політехніка". – 2002. – № 458 : Елементи теорії та прилади твердотілої електроніки. – С. 99–105. – Bibliography: 10 titles.uk_UA
dc.identifier.urihttps://ena.lpnu.ua/handle/ntb/42526
dc.language.isoenuk_UA
dc.publisherВидавництво Національного університету "Львівська політехніка"uk_UA
dc.relation.references[1] A. I. Schwab, “Electromagnetische Vertraglichkeit”, Springer-Verlag, Berlin, New York, 1993. [2] P. Chatterton, M. Houlten, “EMC Electromagnetic Theory to Practical Design”, John Wiley&Sons, New York, 1991. [3] M. Mardiguian, “Interference Control in Computers and Microprocessor - Based Equipment”, Don White, Gainesville, 1987. [4] D. R. J. White, “EMI Control in the Design of Printed Circuit Boards and Backplanes”, Don White, Gainesville, 1986. [5] W. R. Blood, “MECL System Design Handbook”, Motorola Inc., 1988. [6] M. Montrose, “Printed Circuit Board Design Techniques for EMC Compliance”, IEEE Press, New York, 1996. [7] Z. Felendzer, B. Janiczak, T. Gorecki, "Computer-aided Design of Multilayer Printed Circuit Boards with Respect to Reflection and Crosstalk Effects" Proc. of the 20-th Conference of the International Society for Hybrid Microelectronics, Poland Chapter, Jurata, Poland, Sept. 1996, pp. 23-30. [8] M. Montrose, "Analysis on the Effectiveness of Clock Trace Termination Methods and Trace Lengths on a Printed Circuit Board, Proc. of the IEEE 1996 International Symposium on Electromagnetic Compatibility, Santa Clara, California, 1996, pp. 453-458. [9] G. Becke, P. Forstner, E. Haseloff, J. Huchzermeier, “Digital Design Seminar”, Texas Instruments, 1996. [10] V. Golumbeanu, P. Svasta, N. D. Codreanu, "The Noise Immunity of the Digital Circuits", Proc. of the 19th International Spring Seminar on Electronics Technology, May, 1996, Göd, Hungary, pp. 114-119.uk_UA
dc.rights.holder© Virgil Golumbeanu, Paul Svasta, Ciprian Ionescu, 2002uk_UA
dc.subjectprinted circuit boarduk_UA
dc.subjectreflectionsuk_UA
dc.subjectdigital circuitsuk_UA
dc.subjectcapacitance loaduk_UA
dc.titleThe reflections produced by lumped load of digital signal lineuk_UA
dc.typeArticleuk_UA

Files

License bundle

Now showing 1 - 1 of 1
No Thumbnail Available
Name:
license.txt
Size:
2.99 KB
Format:
Item-specific license agreed upon to submission
Description:
Download

Collections

Елементи теорії та прилади твердотілої електроніки. – 2002. – №458