Simulation of output current-voltage characteristics of mos transistors formed on «silicon-on insulator» structures
dc.citation.journalTitle | Елементи теорії та прилади твердотілої електроніки | |
dc.contributor.affiliation | Lviv Polytechnic National University | uk_UA |
dc.contributor.author | Kenyo, Halyna | |
dc.contributor.author | Petrovych, Ihor | |
dc.coverage.country | UA | uk_UA |
dc.coverage.placename | Львів | uk_UA |
dc.date.accessioned | 2018-09-03T11:48:08Z | |
dc.date.available | 2018-09-03T11:48:08Z | |
dc.date.issued | 2002 | |
dc.description.abstract | The current-voltage characteristics of SOI MOS-transistors created in thick (0,5 μm) silicon films by recrystallized laser beam is calculated. A equivalent circuit for computation of drain current includes - MOS-transistor and horizontal bipolar transistor, which form simultaneously in technological process. The peculiarity of formed bipolar transistor is that its base isolated by layers of undergate and insulating oxides. For calculation of the current of the bipolar transistor the potential of “floating substract” (the under-channel region in which the holes accumulated under drain voltage), which causes of sharp increasing of drain current in the range of small drain voltage, is obtained. The characteristics obtained have abrupt current drain region, known as “kink-effect", which can be described as summed influence of both transistors and at the same time the avalanche formation of charge carriers caused by ionisation under influence of strong electric field does not play essential role. Experimental current-voltage characteristics satisfactorily describe by the given model. | uk_UA |
dc.format.pages | 231–238 | |
dc.identifier.citation | Kenyo H. Simulation of output current-voltage characteristics of mos transistors formed on «silicon-on insulator» structures / H. Kenyo, I. Petrovych // Вісник Національного університету "Львівська політехніка". – 2002. – № 458 : Елементи теорії та прилади твердотілої електроніки. – С. 231–238. – Bibliography: 6 titles. | uk_UA |
dc.identifier.uri | https://ena.lpnu.ua/handle/ntb/42579 | |
dc.language.iso | en | uk_UA |
dc.publisher | Видавництво Національного університету «Львівська політехніка» | uk_UA |
dc.relation.references | [1] 6 -P. Silicon-on-Insulator Technology: Materials to VLSI. Kluwer Academic Publishers. 1991, 228 p. [2] Edwards S.P., Yallup K.J., De Meyer K.M. Two-dimensional numerical analysis of the floating region in SOI MOSFET's. IEEE Trans. Electron Devices. 1988, v.35, p.1012-1019. [3] Colinge J.P. Reduction of kink effekt in thin-film SOI MOSFET's. IEEE Electron Device Lett. 1988, v.9, p.97-99. 7.8 6 4 . $ . + 7 . " $ 2 # ! " .%+ 6 - # " " " " 8 " - 0 - 1990.- , , 2'-(3 - )(-91. 7,8 ( . " 7 8 , , " 9 % '()( - 5-1 " [6] Hafes I.M., Chibaudo G., Balestra F. Analysis of the kink-effekt in MOS transistors. IEEE Trans. Electron Devices. 1990, v.37, N 3, Pt.1, p.818-821. | uk_UA |
dc.rights.holder | © Halyna Kenyo, Ihor Petrovych, 2002 | uk_UA |
dc.subject | SOI MOSFET | uk_UA |
dc.subject | “floating substract” | uk_UA |
dc.subject | “kink-effect" | uk_UA |
dc.subject | current-voltage characteristics | uk_UA |
dc.title | Simulation of output current-voltage characteristics of mos transistors formed on «silicon-on insulator» structures | uk_UA |
dc.type | Article | uk_UA |
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